Forum Discussion
Altera_Forum
Honored Contributor
11 years agoSignaltap fixes my problem??
I have a design (without signaltap) that shows a failure. Every attempt to connect signaltap to any signal (even 1 or 2 and the sampling clock) , the problem goes away. I have also seen where the...
Altera_Forum
Honored Contributor
11 years agoSounds like you have some failing paths that then dont fail on recompile - have you got any ansync paths?