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Altera_Forum
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8 years ago

SignalTap different sample depth led to different logic

Hi guys, I met a problem recently. I am using signaltap to capture some signals. When the sample depth is 2k, the signals are correct. But when I change the depth to 4k, some of the signals bec...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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it depends if they are critical to the design you are checking.

Do you also have some asynchronous paths into the logic?

Did you check that the design met timing?

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Hi Tricky,

Yes I have asynchronous paths in the logic.

The timing is OK since the TimeQuest Timing Analysis is green and nike after compile design. The only timing related issues are some Unconstrained Paths shown above.

Thank you!

Leon