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Yt_aem's avatar
Yt_aem
Icon for New Contributor rankNew Contributor
3 years ago

Signal Tap Start-up failure

Hi, I am using Quartus Prime Pro 19.1 and device is Cyclone 10GX150. Using SFL to program the device is successful over the JTAG (See attached SFL.png). But, when opening the Signal Tap, it keep...
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
3 years ago

Hello,
the general cause is that SignalTap is not recognizing the expected design loaded to the FPGA.

Either .jic isn't containing the most recent design with SignalTap, e.g. because it hasn't been refreshed in programming file converter after last rebuild. Or, the most trivial reason, .jic has been flashed but the FPGA still holds factory default image. You need to power-cycle the the FPGA after flashing, or enable "Initiate configuration after programming" in programmer/tools/options. Or reload .sof from SignalTap directly.

Regards

Frank