I'm using Quartus Signal Tap to capture waveforms and encountering a false triggering issue (triggering when the trigger condition is not met, for example, trying to capture the moment when a signal that is constantly low becomes high, but it captures incorrectly). When this false trigger occurs, only half of the waveform is displayed (only the waveform after the trigger position). Has anyone experienced a similar problem? How can this be resolved? (Agilex 7 using HPS)

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Hi xiaohao If I understand correctly, after you disabled the HPS Debug Access Port (DAP), the Signal Tap tool was able to correctly capture both the pre-trigger and post-trigger waveforms?HPS is not within my area of expertise, so I'm not aware if any specific settings are required for Signal Tap to work with HPS.For relevant materials: You may check out the timestamp 29:38 in the "Trigger In" section of this video:Signal Tap Logic Analyzer: Basic Configuration & Trigger ConditionsAdditional reference:2.4.6.8. External TriggersCurrently, file attachments (other than images) are not working in the forum. May I know if you're using an example design or a customer design?If it's an example design, perhaps you could guide me on where you got it from, and I’ll try to replicate it on my end.

I apologize, but I'm unable to share the company's design details. After modifying the DAP, the issue I encountered has been resolved. This matter can now be considered temporarily closed. Thank you all for your valuable assistance and support.

Hi,a popular reason for experiencing "false trigger" or incorrectly acquired signals is tapping signals that are asynchronous to signal tap acquisition clock. Respective signals usually generate timing failure in timing analysis. Seeing no data before trigger event simply means that trigger condition is immediately met.RegardFrank

It is odd to not see any post trigger data like that without a storage qualifier enabled.What are you using as the acquisition clock? Is your design meeting timing as suggested above?

Signal Tap false trigger | Altera Community

11 Replies

KennyT_altera
Super Contributor
2 months ago
ØThank you for using our Community Forum. One of our AE RichardT_altera will be attending to your enquiry
- xiaohao
  New Contributor
  2 months ago
  Thank you. I think I've found a possible reason related to the HPS debug settings, but I'm not sure why yet
sstrell
Super Contributor
2 months ago
It is odd to not see any post trigger data like that without a storage qualifier enabled.
What are you using as the acquisition clock? Is your design meeting timing as suggested above?
FvM
Super Contributor
2 months ago
Hi,
a popular reason for experiencing "false trigger" or incorrectly acquired signals is tapping signals that are asynchronous to signal tap acquisition clock. Respective signals usually generate timing failure in timing analysis.
Seeing no data before trigger event simply means that trigger condition is immediately met.
Regard
Frank
- xiaohao
  New Contributor
  2 months ago
  I temporarily resolved this issue by disabling the hps debug port. Please see the image below.
  Based on my experience, even with immediate triggering, all waveforms should be displayed. For example, if I set all conditions to "don't care," it triggers immediately, but the captured waveform is different from what I described.
  - sstrell
    Super Contributor
    2 months ago
    At the bottom of the Signal Configuration section of Signal Tap, did you have the Trigger In feature enabled using the DAP as the source? That might partially explain this.

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Signal Tap false trigger

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