Forum Discussion
ShengN_altera
Super Contributor
1 year agoHi,
May I know do you have any further concern or update?
Thanks,
Regards,
Sheng
skyviper
New Contributor
1 year agoThanks. This answer makes not sense from a digital signal analysis perspective. I wish there was a forum to talk to a manager to plea my case as to why the reference clock should appear on the trace window.
- sstrell1 year ago
Super Contributor
As I said, Signal Tap cannot be used to fix timing issues. It is for testing and debugging the digital functionality of a design only. If you really want to see a clock in the captured data, select a different signal as the sampling clock and add tap the clock you want to see. However, you’ll need to use an even faster clock as the sampling clock to get good resolution on the captured data for the clock you want to see.- skyviper1 year ago
New Contributor
I do understand that. Its pretending to be a logic analyzer. Selecting a different signal defeats the purpose. Maybe there should be an appnote on what you're trying to tell me. Sure I can use a faster sampling clock but if that clock is in the wrong phase to the clock that I would be putting the trace window, I would be reading things in the wrong frame.
- sstrell1 year ago
Super Contributor
Exactly. This is why you use the timing analyzer instead of Signal Tap to do this type of analysis.