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Altera_Forum's avatar
Altera_Forum
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12 years ago

serailizer/Desserializer solution for Cycole III FPGA

Hi Everyone,

Currently we are designing the project using cyclone III FPGA. Could please help to get info how can i implement serailizer/desserializer in fpga?

here is the my requirement:

TWO SERDES (2 Tx, 2 Rx) on Cyclone 3. With below logic as well

  1. 8b/10b encoding

  2. Data alignment (state machine based sync)TWO SERDES (2 Tx, 2 Rx) on Cyclone 3. With below logic as well

  3. Fifo.

Any help will be highly appreciated.

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

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    Hi Jerry,

    I know about cypress solution and we have our own USB Controller, Please take look about usb from us from the following link.

    http://www.slscorp.com/ip-cores/communication/usb-20-device.html. Any way thanks for the help. If you have any requirement for USB please visit www.slscorp.com..we are the partner of altera.

    --- Quote End ---

    Thanks for you info!