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Altera_Forum
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11 years ago

serailizer/Desserializer solution for Cycole III FPGA

Hi Everyone, Currently we are designing the project using cyclone III FPGA. Could please help to get info how can i implement serailizer/desserializer in fpga? here is the my requirement: ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

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Hi Jerry,

Yes, we are planning to do use using LVDS. Our target speed is 400 Mbps, is it possible using LVDS in cyclone III?

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It'll be ok even without serdes!