Forum Discussion
RonSegev
New Contributor
New ContributorSecurity Features of MAX 10 FPGA Internal Flash
Hello, I’m looking for more information about the security design features of the internal flash in MAX 10 FPGAs. Specifically: 1. Can read, write, and erase operations be disabled via JTAG or the O...
Farabi_Altera
Regular Contributor
Regular ContributorHello,
You can refer to link : https://www.intel.com/content/www/us/en/docs/programmable/683865/current/configuration-design-security.html
for MAX10 design security features.
regards,
Farabi
