Hi,
I was also looking for an SDR SDRAM controller for the SDRAM an DE1/DE2 boards and for my purpose, I did the following workaround:
Simply create a NIOS II SOPC System and integrate the SOPC SDRAM controller into this system (make sure to set the right parameters according to the SDRAM chip on DE1/DE2 boards). After generation of the SOPC system, you should find a file named "sdram_0.vhd" (for VHDL users) in your project directory. Within this file you can find the entity "sdram_0" which defines the SDRAM controller and its AVALON-MM inputs and output ports. You can then use this entity in your custom logic design for accessing the SDRAM. Simply connect the controller to the appropriate output pins of you FPGA and design some custom logic such, that it connects to the SDRAM controller using the AVALON ports. I.E. your logic imitates an AVALON MASTER and the SDRAM controller is the AVALON SLAVE.
Hope you got an idea what to do ....
Markus