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Honored Contributor
Honored ContributorSDRAM Clock
Hi, I use SDRAM controller to connect FPGA and SPANSION(167 MHz) SDRAM. Nios II processor run up to 100 MHZ clock and I can not use higher frequency. I did not use dedicated PLL FPGA pin for S...
Altera_ForumHonored Contributor
Honored Contributori remember some party said this is experimental value interm of the phase shirt and the delay number.. actually 100Mhz is also working.. you can double check with the memory test software example.
