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Honored Contributor
Honored ContributorSDRAM Clock
Hi, I use SDRAM controller to connect FPGA and SPANSION(167 MHz) SDRAM. Nios II processor run up to 100 MHZ clock and I can not use higher frequency. I did not use dedicated PLL FPGA pin for S...
Altera_ForumHonored Contributor
Honored Contributor-100 degree shift seems to me a high value.
I look back to an old project with a Cyclone III device and 100MHz clock and I see I used -26 degrees.
