Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorSDRAM Clock
Hi, I use SDRAM controller to connect FPGA and SPANSION(167 MHz) SDRAM. Nios II processor run up to 100 MHZ clock and I can not use higher frequency. I did not use dedicated PLL FPGA pin for S...
Altera_ForumHonored Contributor
Honored ContributorUsually you have to use a dedicated PLL output for sdram, not for a matter of different frequencies, but because the sdram clock needs to be phase shifted in order to meet the timing constraints.
