Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

SDC problem

Hi, i want to implement a SoC with the maximum frequency of my board StratixIV Gx. I used one pll with two output, first output pll.c0=150Mhz, second output is 125Mhz. After a compilation and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Just concerned by your statement that you're wating on my guidance, as I won't be able to provide anymore. Sorry about that.