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Vic3Dexe's avatar
Vic3Dexe
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

SDC constrains for async static RAM

I have async static RAM with 10 ns access time. I try to read data from it in such a way, that address formed in one register, then data latched to another, both have the same clock 50 MHz (20 ns)....
Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello,


We did not receive any response to the previous reply provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.


Regards,

Nurina


P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution.