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Altera_Forum
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14 years ago

Sample synch. signal with unknown phase shift

Hi All, I have a following problem. I have two devices (Transmitter and receiver). Both devices have a synchronous clock with unknown phase. The distance of the devices is about 300m and they ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I am not sure. I am programing in VHDL so it will take some time to check verilog file. How ever this solves phase shift of the bus but not the phase shift of the individual bits ?? Do I understand it correctly ???