Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi John
AFAIK it can be one of the following cases: - pins located on different fpga banks, configured with different voltage standards - you have a problem in your design and 1.14V pin is driving a line which is an output from another device/pin; if this device is driving a logic low, then voltage will settle to a middle level; clearly this is not good for both the devices. Regards Cris