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GDeXi's avatar
GDeXi
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
Solved

S10 Device Pin status

MSEL1 and MSEL2 are both external 4.7K resistor pull-downs, but measured as 1.8, look at s10 pcg doc, there is an internal 25K pull-up, according to my understanding should be between 1.8 and 0。

IO_AUX_RREF external 2.8K pull-down, RREF_SDM external 2K pull-down, but the test is about 500mv, this is normal? Or the wrong design.

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    6 years ago

    Hi Guo DeXin,

    Perhaps you will need to check your board signal integrity. In S10, pin connection guidelines, it is recommended to route in a way that no aggresor on this. More over, it is a reference resistor pin, is a input pin instead.

    Thank You.

5 Replies

  • GDeXi's avatar
    GDeXi
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    upload image about IO_AUX_RREF and RREF_SDM

    Tks for your help!

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi DeXin,

    Apologize i dont really understand the question. Are you saying that the output voltage observed with external 2.8K pull down, the voltage is 500mV and this is abnormal?

    Thank You

    • User1574410249703619's avatar
      User1574410249703619
      Icon for New Contributor rankNew Contributor
      6 years ago

      Yes,The pin IO_AUX_RREF and RREF_SDM , the voltage is 500mV and this is abnormal?

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi Guo DeXin,

    Perhaps you will need to check your board signal integrity. In S10, pin connection guidelines, it is recommended to route in a way that no aggresor on this. More over, it is a reference resistor pin, is a input pin instead.

    Thank You.