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Mikhail_a's avatar
Mikhail_a
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

RVALID is high after reset on Agilex 7 M-series F2H bridge

Hello I work with Agilex 7 M-series device and I see a strange behavior of F2H bridge. I see that after deasserting f2h rst_n RVALID and BVALID signal go high, also I see some data coming from RDATA...
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EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi,

Are you using this board?:

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html

May I know how you boot up the board, using SD card etc?

Can you explain briefly how you perform the reset, is it thourgh the signal tap?

Also, if you do a power cycle of the board does the signal also behave the same?

If you are using the above aforementioned board, we have the GSRD for it:

https://www.rocketboards.org/foswiki/Documentation/AgilexSoCGSRDDEVAGM039F