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Altera_Forum
Honored Contributor
9 years agors232 uart ip :: user guide
hi, // unnamed.v
// Generated using ACDS version 16.0 211
`timescale 1 ps / 1 ps
module unnamed (
input wire address, // avalon_rs232_slave.address
input wire chipselec...
Altera_Forum
Honored Contributor
9 years agohi,
thanks much for the information. now i got some idea about this. i need to create a qsys system which include nios 2 processor and uart and onchip rom. but how will i connect the register(updating @200 hz) value inside the fpga to the processor ? to the rs232 txdata register? if it is so: txdata register declare that first 8 bit are only used to transmit data.. so do i need to worry about 16 bit txdata width ? i just need to asssign 8 bit data to txdata register right?? (lsb 8 bits ) regards