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Honored Contributor
Honored ContributorRoute HPS UART pins to FPGA pins DE0 nano SoC
Hi I am using a DE0 nano SoC and I need, for my VHDL design, the RX and TX signals from UART (I understand they are available just for de HPS Cortex A9), but in this case I need them to connec...
Altera_ForumHonored Contributor
Honored ContributorIf I am not mistaken, the address map from Qsys will be placed inside .sopcinfo file, and you can use the "sopc-create-header-files" utility to create the C header files
