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Altera_Forum
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11 years ago

Rise fall time I/O LVTTL EP2C5T144C8N

Hello forum members, I am currently in the process of designing a PCB with the EP2C5T144C8N but am facing uncertainties regarding the rise fall time of the I/O (as output). The reason I want ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

After my last post I was planning to place the termination resistor because I thought it could not do any harm,

the LTspice simulation however has convinced me it is more of a necessity then I originally conceived.

The cyclone handbook states it can handle overshoot of up to 4.5V at 10% duty cycle, but that is just too close for comfort.

It seems wise to leave room for error..

Thank you for providing me with these insights :)