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Altera_Forum's avatar
Altera_Forum
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16 years ago

reset vector for NIOS II development kit

Hardware: Neek starter kit.

I am trying to write some simple code for the NIOS II processor and I ran into some problems after building my SOPC system up. I am not not sure what is causing the problems I am having, but I thought it might be the reset/exception vectors.

Question: If I am going to be debugging code, not final development, what should I set Reset and Exception vectors to? I want to only use DDR memory, flash memory, and onchip as my final design will only contain these. I tried setting my reset vector to DDR_memory address offset 0x0 and my exception vector to OnchipRam offset 0x0. Should this work? Or, should I set my reset vector to Flash address 0x100000?

The reason I am asking is because my design keeps saying verify failed if I try to debug with the reset vector set to flash.

Any help would be greatly appreciated.

Thanks,

Andrew

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    When you are debugging code, you should put your application in RAM, either DDR or onchip. You can set the reset vector, exception vectors and the application in the same area. Check also in the IDE that you put your application in the same memory (system library settings).

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    When debugging, you can set your reset vector either to flash or RAM. Your exception vector should always be located in RAM of some kind, typically the same RAM you intend to run out of. What's more important is that you specify in your system library or BSP the memory sections (in RAM) that you want the program to execute from.

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Hi Jake,

    Drop by to ask one question about placing memory in exception vector.

    I found that if I place onchip memory for exception vector, cfi flash for reset vector and my program run from ssram, the Nios II system boot up upon reset.

    However, if I change my exception vector to ssram (as you said, "exception vector should always be located in RAM of some kind, typically the same RAM you intend to run out of"), somehow, my nios II system cannot boot up.

    Do you have any idea wat's going on? I am using Nios II Cyclone II 2c35 board.

    Please help

    Caridee
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    So to clarify:

    reset -> CFI Flash

    exception -> SRAM

    code -> SRAM

    Correct?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Hi Jake,

    Yes you're right

    Nios II cannot boot up

    1. reset -> CFI flash

    2. exception -> SRAM

    3. .text, .rodata , rwdata -> SRAM

    Nios II can boot up

    1. reset -> CFI flash

    2. exception -> onchip ram

    3. .text, .rodata , rwdata -> SRAM

    Do you know why or any advice given?

    Thanks,

    Caridee