SnehalB
New Contributor
4 years agoRequired ECC coding technique , compatible with Intel FPGA ALTECC decoder IP core.
Hi ,
we are using Cyclone V e FPGA and wanted to use Intel FPGA ALTECC IP core as decoder with input encoded data as 72bits ( 64bit data + 8 Bit parity). we are implementing ALTECC IP at our receiver data stream within fpga , whereas source of data is from external SBC (non fpga) device.
So What encoding technique should we implement at source SBC device for use to correctly detect/decode ECC data at receiver in FPGA. will hamming code implementation at source device will work?
kindly suggest different ECC coding technique for external device compatible with Intel FPGA ALTECC decoder IP core for above data configuration 72bits ( 64bit data + 8 Bit parity).
thanks ,
Snehal B.