removal VCXO, Avalon-MM addresses

Hi,

Could you please confirm if the reference clock of the

TX PLL is correct? As per the user guide, it is required to running @ 100MHZ

from oscillator.

Besides, you can refer to the following document to

generate the example example without VCXO from the IP GUI by using the newer

version of Quartus and see if encounter the same problem.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-sdi-ii-de.pdf