Forum Discussion
Altera_Forum
Honored Contributor
17 years agoI think the following line:
IOWR( REMOTE_UPDATE_CONTROLLER_BASE, 0x4, hw_flash_offset >> 3) Should be: IOWR( REMOTE_UPDATE_CONTROLLER_BASE, 0x4, hw_flash_offset >> 2) I seem to recall having the same problem as I think one of the Altera app notes uses shift by 3 for some reason. However, when I monitored the SPI lines on a scope I could see the address being read from the memory was off by 1 bit. When I changed it to shift by 2, it started to work. According to the Cyclone III handbook, the address register is the most significant 22 bits of the 24 bit boot address, so a shift by 2 does make sense.