Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorRemote update Flash EPROM (EPCS16) using lan/ uart
Hello all, i have question. I need to update throw ethernet my flash memory EPCS16 on some board with EP3C16 FPGA. The ethernet i convert to uart using xport and the data from uart i need to sa...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- but which bit disable watchdog --- Quote End --- The table tells that parameter 100 must be written to 0. AN603 documentation has even signal tap waveform of individual parameter read and write operations, but the parameter addresses are for Arria II. Generally, you can do some debugging to find out what happens in your previously described test. You try to start the application image and it fails. But waht happens: - no reconfig started at all - reconfig with wrong start address - reconfig with right address but invalid image - reconfig with valid image but watchdog causes reboot
