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Honored Contributor
Honored Contributorregarding avalon interface
Hi all, I have a slave from which I want to read data and write data into it using Nios II processor as a master. Can anyone explain me how to use signal "address lines" of avalon mm interface to ...
Altera_ForumHonored Contributor
Honored ContributorHallo Avani27
A computer has an adress and a data bus that links the CPU to the RAM memory. Adress lines of the avalon MM are the lines that adress wich byte from the RAM (in FPGA or outside of FPGA) needs to be written or read by the processor. The data lines transport the data between the processor and the memory. Avalon refers to the general concept, the architecture that makes things work. For examples you can refer to the altera universty web site, there several nios examples are provided you might consider https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/tt/tt_my_first_nios_sw.pdf Best Regards en welcome to the forum. Johi.
