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Altera_Forum's avatar
Altera_Forum
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8 years ago

Reduce clock frequency when system clock is dynamic

Hi, I would like to know a method to divide the clock to a certain frequency. I am aware of different methods of clock divider but the thing here is that the on-board system clock is dynamic (not fix...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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'Guess/calculate the accurate frequency of the internal clock?' ... You can assume, as I said before, the internal clock will be between 3.9 and 5.3MHz. Or as 4.6MHz +/- 0.7MHz. So I suppose you could 'guess' 4.6MHz, but it has a +/- 700KHz uncertainty.

I see. Thanks for the clarification. Last question: Is it only necessary to create SDC files if I want to analyze the timing or do I need to create it each time in order to generate the bin file?