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Altera_Forum's avatar
Altera_Forum
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8 years ago

Reduce clock frequency when system clock is dynamic

Hi, I would like to know a method to divide the clock to a certain frequency. I am aware of different methods of clock divider but the thing here is that the on-board system clock is dynamic (not fix...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Actually I am not sure what the min/max range of the dynamic clock is. If I can config the on-board clock to be fixed frequency I can of course do that, but I am not sure how. Do I need to create a Synopsis Design Constraint (SDC) file and then calculate the frequency or is there another way to obtain fixed frequency on the on-board clock?

Thanks.