Honored ContributorHi,
I want to reconfigure my FPGA when it is running, loaded with an initial timing file, with a timing that I wrote in MS Excel. I saw that FPGA programmers do this. How does this work? thanks.
Honored Contributori'm not sure what you're trying to do. what exactly do you mean by timing file? where have you seen this before?
Honored ContributorHi,
thank you for answering. Suppose I declare a puls of a certain width in the VHDL code of my FPGA. Now I want to declare a timing diagram in MS Excel to change the width of this puls for experimental reasons. This diagram I want to upload into the FPGA while it is runninig via some conversion to a fileformat that is known by the FPGA without recompiling the code in Quartus. This converted timing file should be uploaded via a serial line to the FPGA. Maybe RAM of the FPGA is needed. I know this can be done with Xilinx FPGA's. Hope you understand me. Regards, MarcHonored ContributorIt cant be done with any specific FPGAs. How you interpret data sent to the FPGA via the serial is up to you. There is no "universal excel data controller" for FPGAs.
Do you know exactly what you've seen before? Im guessing someone wrote some custom software to do it.Honored Contributorthe In System Memory Content Editor is not a full solution, but its an easy way to update constants in the FPGA without creating a new image. it won't interface directly with Excel, you'll have to compute the new constant and type it into the Editor
beyond that its a bigger project. you could use System Console, a NIOS processor with JTAG UART, a real UART with a NIOS or state machine, etc
