Thomasu
New Contributor
New ContributorRecompilation with MIF changes only
Hello
I'm doing FPGA emulation of digital sections of chips prior to manufacturing.
My architecture is as follows:
-- an embedded processor, its MIF file for the software (not NIOS) and its peripherals
-- the RTL of the device to emulate
The time required to process the process is roughly 1h.
Sometimes I only need to update the MIF (to correct SW bugs..) and the whole thing goes for a complete compilation, to me this really is unnecessary:
-- as the size of the RAM where the MIF goes is always the same
-- never any other design change
How could I make this faster?
Thanks for your advice
