If you are trying to use Floating point numbers (real) inside an FPGA, there is probably something wrong with the origional spec. Floating point math is horrible and eats up alot of logic.
Try and re-spec the design to used fixed point math instead. It fits right in with what FPGAs do. and then also look at using this package from the IEEE:
http://www.vhdl.org/fphdl/vhdl.html Its fully synthesisable in quartus, but dont try and use the floating point parts of it, unless you want to clock the design extremly slowly (or use the altera FP units instead.
In addition, its normally best to implement sin/cos functions using a ROM as it is alot more practical. And remember, keep it fixed point.