Reading data from a ROM

I post a code for implementing a ROM without using Megawizard.

That's the thing though, I need to use an external file like a .txt or .mif to initialize the memory and the intention is that the text file contains the version of the firmware and that file is controlled by another software, it's not going to be a fixed value, so I need a code that won't change, what will be changing always is the txt/mif file.

It appears to me that you simply need to add some addressing logic to your RAM. This could easily be done with a state machine, where you use a variable counter that gets incremented every other state, and the interposing states is where you read the output of your RAM. This works well with single clock synchronous RAM's. I've done this before and had good success. You just need a trigger event to tell the state machine to start; this could be in your FPGA fabric somewhere or even an external switch to tell the memory controller to execute. -James

It's what I did, but I don't seem to get anything on the output... tried several different ways too.

    port
    (
        -- 50MHz clock
        clock          : in std_logic;
        reset       : in std_logic;
        ver         :    out std_logic_vector(15 downto 0)
    );
----------
    component rom                     -- MegaWizard created rom
    port
    (
        address    : in  std_logic_vector(4 downto 0);
        clock        : in  std_logic;
        q        : out std_logic_vector(7 downto 0)
    );
    signal addr_rom        : std_logic_vector(4 downto 0);
    signal data_out_rom    : std_logic_vector(7 downto 0);
    
    type state is (addr0, addr1);
    signal st : state;
----------
    rom_inst : rom
    port map
    (
        address    => addr_rom,
        clock         => clock,
        q         => data_out_rom
    );
    process(reset, clock)
    begin
        if reset = '1' then
            st <= addr0;
        elsif rising_edge(clock) then
            case st is
                when addr0 =>
                    addr_rom    <= "00000";
                    ver(15 downto 8) <= data_out_rom;
                    st <= addr1;
                when addr1 =>
                    addr_rom    <= "00001";
                    ver(7 downto 0) <= data_out_rom;
                                        st <= addr0;
                when others =>
                    st <= addr0;
            end case;
        end if;
    end process;

Hello Carili.

What you are attempting I have done in the past to store hardware versions and software build numbers but I had Nios II reading out the values.

BadOmen:

Can you explain the whole project your trying to do? It would be easier to find the problem.

Your code below is a good attempt, however, you need something where you increment the address, then read:

    port
    (
        -- 50MHz clock
        clock          : in std_logic;
        reset       : in std_logic;
        ver         :    out std_logic_vector(15 downto 0)
    );
----------
    component rom                     -- MegaWizard created rom
    port
    (
        address    : in  std_logic_vector(4 downto 0);
        clock        : in  std_logic;
        q        : out std_logic_vector(7 downto 0)
    );
    signal addr_rom        : std_logic_vector(4 downto 0);
    signal data_out_rom    : std_logic_vector(7 downto 0);
    
    type state is (addr0, addr1);
    signal st : state;
----------
    rom_inst : rom
    port map
    (
        address    => addr_rom,
        clock         => clock,
        q         => data_out_rom
    );
    process(reset, clock)
    begin
        if reset = '1' then
            st <= addr0;
        elsif rising_edge(clock) then
            case st is
                when addr0 =>
                    addr_rom    <= "00000";
                    ver(15 downto 8) <= data_out_rom;
                    st <= addr1;
                when addr1 =>
                    addr_rom    <= "00001";
                    ver(7 downto 0) <= data_out_rom;
                                        st <= addr0;
                when others =>
                    st <= addr0;
            end case;
        end if;
    end process;

process(all)
variable addr : natural range 0 to NUM_PARAMS;
begin
    if HRST then
        param1 <= (others => '0');
        param2 <= (others => '0');
        param3   <= (others => '0');
        
    elsif rising_edge(MCLK) then
        case state is 
           when S0 => 
              if Update then
                 state <= S1;
              else
                 state <= S0;
              end if;
              addr := 0;
              
           when S1 => addr := addr + 1;
           state <= S2;
           
           when S2 => param1   <= coeffData;  (This would come from your ROM that you instantiate)
           state <= S3;
           
           when S3 => addr := addr + 1;
           state <= S4;
           
           when S4 => param2   <= coeffData;
           state <= S5;
           
           when S5 => addr := addr + 1;
           state <= S6;
           
           when S6 => param3    <= coeffData;
                   and so  on . . . .

I'm trying to create a code that can show the VHDL firmware version, like everytime someone changes a firmware, the version changes, and that version number is in a txt file, so the VHDL code I am trying to make, it reads those numbers and everytime the code is compiled it contains the new firmware version.