It's what I did, but I don't seem to get anything on the output... tried several different ways too.
Here's the state machine:
port
(
-- 50MHz clock
clock : in std_logic;
reset : in std_logic;
ver : out std_logic_vector(15 downto 0)
);
----------
component rom -- MegaWizard created rom
port
(
address : in std_logic_vector(4 downto 0);
clock : in std_logic;
q : out std_logic_vector(7 downto 0)
);
signal addr_rom : std_logic_vector(4 downto 0);
signal data_out_rom : std_logic_vector(7 downto 0);
type state is (addr0, addr1);
signal st : state;
----------
rom_inst : rom
port map
(
address => addr_rom,
clock => clock,
q => data_out_rom
);
process(reset, clock)
begin
if reset = '1' then
st <= addr0;
elsif rising_edge(clock) then
case st is
when addr0 =>
addr_rom <= "00000";
ver(15 downto 8) <= data_out_rom;
st <= addr1;
when addr1 =>
addr_rom <= "00001";
ver(7 downto 0) <= data_out_rom;
st <= addr0;
when others =>
st <= addr0;
end case;
end if;
end process;
How can I be sure the .mif file was loaded?
I don't know what is going wrong... James could you please post a code of what you meant?