Reading data from a ROM

It appears to me that you simply need to add some addressing logic to your RAM. This could easily be done with a state machine, where you use a variable counter that gets incremented every other state, and the interposing states is where you read the output of your RAM. This works well with single clock synchronous RAM's. I've done this before and had good success. You just need a trigger event to tell the state machine to start; this could be in your FPGA fabric somewhere or even an external switch to tell the memory controller to execute. -James