Read flash attached to Max II in Parallel Flash Configuration on legacy system

Thank you for the quick reply.

I have 3 altera logic devices. Each has its own labeled byte blaster port. I have no schematics nor source code so some of this is educated guesses from observable chips. The two Cyclone FPGA's do not appear to have dedicated serial flashes on the board and when I connect to them with the Byte Blaster, each FPGA is correctly identified by the programmer and the programmer reports no serial flash.

I am not 100% certain, but it appears that the CPLD accesses the Micron Flash somehow to program the the FPGA's. No idea of the method or even if this is true.

When I connect to the CPLD with the programmer:

• It correctly identifies the CPLD
• Does not automatically identify any attached flash
• Allows me to scrape a 43kb pof file from the CPLD that I am pretty confident is just the contents of the CPLD and not the attached flash.

I can within the programmer manually choose to add a CFI chip attached to the CPLD. But when I do so, it disables the examine / readback capability.

It is entirely possible that it is just a dumb user problem but I have explored the user interface for programmer and googled with no definitive answers.

Your comment about BSDL is a valid tool but not sure how I could use it to advance my goals. I suppose it would be possible to brute force bit bang a flash read transaction but that sounds quite difficult.

Any additional ideas on tools and techniques that might allow me to read back the contents of a CPLD attached flash so that I could clone to spare hardware with the tools and information that I have? It is not unreasonable to license the IP if it would enable that.

Thank you,

David