Forum Discussion
tedh4ddv
Occasional Contributor
Occasional Contributormultiple sof fpga configuration files stored in single flash
I gather that two or more .sof files may be combined to a single .jic file and written to an active serial flash device using the Serial Flash Loader IP core. I am not clear on how the fpga can be t...
tedh4ddvOccasional Contributor
Occasional ContributorAsking more simply, does the RSU Core handle the loading of a new .jic file into serial flash along with handling the switching between configurations?
tedh4ddvOccasional Contributor
Occasional Contributor...or would I need to connect the Avalon output from the SPI_to_AvalonMaster core to both the Remote_Update core AND the AvalonSlave_to_SFL cores?
