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tedh4ddv
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2 years ago

multiple sof fpga configuration files stored in single flash

I gather that two or more .sof files may be combined to a single .jic file and written to an active serial flash device using the Serial Flash Loader IP core. I am not clear on how the fpga can be t...
Configuration
tedh4ddv's avatar
tedh4ddv
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Asking more simply, does the RSU Core handle the loading of a new .jic file into serial flash along with handling the switching between configurations?

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tedh4ddv
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

...or would I need to connect the Avalon output from the SPI_to_AvalonMaster core to both the Remote_Update core AND the AvalonSlave_to_SFL cores?