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jjang's avatar
jjang
Icon for New Contributor rankNew Contributor
2 years ago

[MAX10] when Boot (CFM0) All IO port High → All port Low

as i know All FPGA have configuration Time. During Configuration Time, All IO port weak pull up(100kΩ ~ 1MΩ) → All IO port High. Can i change Pull-up → Pull-Down? using Max10 Settings? * My FPGA ...
Configuration
Farabi's avatar
Farabi
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


Yes, you can set internal pulldown to the IO pins using the pin setting tool.


regards,

Farabi


jjang's avatar
jjang
Icon for New Contributor rankNew Contributor
2 years ago

it's mean. during Configuration => User Can modify each pin pull-up/down ?

i tried both of them . doesn't not work. during configuration..

My Device, 10M08SAE144C8G (3.3v Single Power Supply)

set(Checked) Weak pull up Settings

Pin planner → Reserved →

> as output driving ground → High (when Configuration Time) , Normallay Low(when PWR UnStable) and Sometime High for Few ns

> as output driving Vcc → High (when Configuration Time), Glitch_High(when PWR UnStable)

unset(unChecked) Weak pull up Settings

Pin planner → Reserved →

> as output driving ground → LOW (when Configuration Time), Normallay Low(when PWR UnStable) and Sometime High for Few ns

> as output driving Vcc → LOW (when Configuration Time), Glitch_High(when PWR UnStable)