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Altera_Forum
Honored Contributor
17 years agordreq didnt read all the data in dcFIFO (functional simulation)
hi, i have question regarding to rdreq in DCFIFO. i'm writing 4 16-bits data into dcFIFO at 100Mhz speed. and read at 200Mhz speed. the problem now is, rdreq didnt read all 4 data in FIFO. onl...
Altera_Forum
Honored Contributor
17 years agowrfull looks high on that first write. There is circuitry on by default that disables extra writes/reads when full or empty, as that can completely corrupt the fifo.