[RapidIO] How to simulate RapidIO IP core？

Hi,

An Altera Technical Writer wrote the following response to your query. I hope it helps. For other issues related to technical documentation, please write to [email protected], and we will send you a direct response.

Regards,

Severin Foreman

Manager, Technical Communications

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The RapidIO MegaCore Function User Guide currently on the Altera website is correct for the 14.0 and 14.0 Arria 10 Edition software releases. However, it is out of date for the 14.1 and 15.0 releases, and some changes have occurred in the simulation instructions.

These changes are partially explained in the known issue in the Altera Knowledge Base at https://www.altera.com/support/support-resources/knowledge-base/solutions/fb247103.html . Additional changes that will appear in the Knowledge Base in the next week or so are listed below:

1. Listed already: TOP_LEVEL_NAME for ModelSim simulation of Arria 10 RapidIO IP core variations has changed in the 14.1 release, to <your_ip>_altera_rapidio_<version>.tb.

2. To be added soon: TOP_LEVEL_NAME for ModelSim simulation of non-Arria 10 RapidIO IP core variations has changed in the 14.1 release, to rapidio_0.tb 3. To be added soon: Instructions that involve the srio_simulator.tcl file for simulation of non-Arria 10 RapidIO IP core variations are no longer valid, starting in the 14.1 release. You can simply skip the instructions in the 14.0/14.0 Arria 10 Edition user guide that ask you to type "do srio_simulator.tcl".