Forum Discussion
eagles
New Contributor
New ContributorQuestions about RapidIO II IP core
Hello!
I am trying to use Rapidio II IP core to establish SRIO communication between FPGA and DSP. Here are some questions I have met:
Question 1
Are these signals used by users to tran...
Hi,
Below is the answers for your questions:
- Yes, those are the Pass-Through Interface Signals
- The Avalon-ST pass-through interface is an optional interface that is generated when you select the Avalon-ST pass-through interface in the Transport and Maintenance page of the RapidIO II parameter editor.
- Yes, only 128 bits.
For more details, please refer to Rapid IO II UG.
Regards,
Pavee
paveetirrasrie_Altera
Frequent Contributor
Frequent ContributorHi,
I’m glad that your question has been addressed, I now transition this thread to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.
Otherwise, the community users will continue to help you on this thread.
Thank you.
