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Honored Contributor
Honored ContributorQuestions about Asynchronous RAM on CycloneII
I have one question regarding the asyn ram on cycloneII Basically, I want to instantiate a small size of reg mem, like reg [n-1:0] mem [0:m-1], and input data into it through PIO output port f...
Altera_ForumHonored Contributor
Honored ContributorWhat do you exactly mean with asynchronous in this case? The write logic still has to use a write enable signal. One option is to connect the we signal as write clock of a true dual port RAM. If the control signals are slow, they can be also synchronized to the design clock.
