Question on LE

Reviewing your posts, I didn't find any explanation, why you want to count "gates" at a medium complex level, including e.g. XOR function. I don't see a reasonable motivation, unless you are targetting to a hardware, that would actually offer this level as atomic logic element. I only found this explanation:

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i think it will be odd to report a result as such in my work.

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I think, it would make more sense to count units, that are actually measuring the implementation effort for a particular design process. For FPGA, LE are clearly the correct unit, for ASIC implementation, counting AND and XOR (and some other cells) can be meaningful. But you should consider, that basic gates (AND, OR, NOT) and complex gates (e.g. XOR) have a different area requirement. To optimize a circuit for ASIC implementation, the design tool has to know the cost factors.