Forum Discussion
MK_ABQ
Contributor
3 years agoQuestion on Arria 10 FPGA Development Kit User Guide
Hi,
UG-20007 2021.03.19
In the following section ( picture below), it says "These devices are part of the shared FM bus that connects to the flash memory and MAX V CPLD EPM2210 System Controlle...
MK_ABQ
Contributor
3 years agoGreat!. The answers are clear. I am gonna shoot more basic questions to help me understand the specifics. Please bear with me.
Now, moving further to how the 1-Gbit flash memory is connected, I see that there are two flash chips (u4), and (u5) in the schematic which shares an Address bus, and also two interesting notes in blue color at the bottom. (attaching picture below).
I would like to understand, why the connection in made in such a way with 2 flash memories?. Is there a specific reason?
And, what does the note in the blue signify?. I believe as per the schematic, I should focus on the 2nd note which mentions about dual flash device. Am I right?