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MK_ABQ's avatar
MK_ABQ
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3 years ago

Question on Arria 10 FPGA Development Kit User Guide

Hi, UG-20007 2021.03.19 In the following section ( picture below), it says "These devices are part of the shared FM bus that connects to the flash memory and MAX V CPLD EPM2210 System Controlle...
MK_ABQ's avatar
MK_ABQ
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3 years ago

Hi sstrell,

Thanks for the response. I have further three more questions.

Q1) So the Max II CPLD is the system controller is it?

Q2) And also what is the usage of EPCQ1024L in page 14 of the schematic?.

Q3) I understand Max II & Max V are used for configuring the on board USB blaster, and control configuration of FPGA from flash respectively. Is my understanding correct?

Thank you.

sstrell's avatar
sstrell
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3 years ago
1) no like I said, the Max II is for the USB Blaster. Again see the schematic. There’s a block diagram on the first page.
2) I’m not at my computer now but that’s a configuration device with flash memory to store programming data.
3) yes.