Forum Discussion
Altera_Forum
Honored Contributor
9 years ago --- Quote Start --- a -to will mean any path to register sync_rst including sync to sync_rst. I suggest adding max/min delay to that path to override but I am not sure if t will override --- Quote End --- This sounds interesting. I'm not sure what values I should be using though, it seems pretty arbitrary. I'll try it out and see if it actually overrides the false path. --- Quote Start --- There's usually no need to specifically constrain a reset synchronizer, as long as reset is an external input and not sourced from a constrained clock domain. --- Quote End --- Unfortunately, the reset is not always sourced from an external input and there are cases that need to be synchronized from another clock domain. For example, some modules are used in just about all of our projects and, since we can't be sure everyone will be using the correct async reset, they have an internal reset synchronizer, in this case the signal might come from an input pin or an already synchronized reset. It's also useful to us during debugging, we might need to intentionally reset a module and the logic that drives this reset might be running on another clock domain. Thank you both for the answers! Regards, Sebastian.