Question about power sequencing on agilex7

Hi,
you know that 1. and 2. are violating power sequencing requirements. There's apparently no guaranteed behaviour. User guide just states:
"Design your power supply solution to properly control the complete power sequence. The requirements in this section must be followed to prevent unpredictable current draw to the FPGA device, which can potentially impact the I/O functionality."

It says unpredictable, which IMHO includes possible damage. How likely - I don't know.

I see that Cyclone 10 GX handbooks specifies relaxed power down sequencing which can be used under circumstances (if the rails are not actively discharged). It guess that the present user guide tries to specify a clear scheme, leaving out possible exceptions and circumventions.

This also means, be happy if you didn't yet observe FPGA damage but try to reach the main road in a redesign.

Regards

Frank