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Altera_Forum's avatar
Altera_Forum
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15 years ago

Question about Monitor

Hello, is it possible to synthesize the "monitors" on the altera fpgas'. There are Monitor IPs such as Avalon MM Monitor. Can I synthesize such "Monitors"?
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

that write transaction should then be accepted by the target interface on the second design (bar0 access)

Isn't this in the first design itself? the second design is only the RAM right? I think my thinking is restricted to what I have been thinking all these days. Please explain everything explicitly, I think I have misunderstood some of the stuff.

Thanks