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Altera_Forum
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16 years ago

Question about clock + PLL

Hi, probably that is going to be a very noob question but... I am using PLL on a Clyclone II, and i was clocking some blocks directly from my 50Mhz oscilator input and some other blocks from a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

This is probably (OP didn't provide too much details) an issue of hold timing violations due to transfers between the original clock and the PLL output one.