Quartus Programmer no longer detects FPGA/CPLD

The only message that Quartus Programmer provides is that it cannot detect any device on the JTAG Chain. Normally the Arria II FPGA is detected and when it is selected the CPLD and CFI_1G appear in the programmer window.

One thing that I failed to do with this PFL project was to assign the CPLD output pin FPGA_RST_N. I checked it the other day and it was 0V. So the FPGA is in reset. This signal is tied to a 10K pull-up so I was able to briefly put VCC3V3 on it but this did not help with the detection.

When I created the PFL_CONFIG CPLD project I did assign the PFL outputs to some CPLD_DEBUG output pins tied to a header. I do see some minimal action for the CFG_A, CFG_D, CFG_ON_N and CFG_WE_N but the signals are only active for a short time. I am now wondering if the PFL is doing something to the JTAG chain that prohibits it from seeing any devices. This is a strange problem. Any suggestions are welcome. Thanks.